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    Home»Operating Systems»Microsoft rolls out Windows 11 25H2 Preview Build 26200.5074 to Insiders

    Microsoft rolls out Windows 11 25H2 Preview Build 26200.5074 to Insiders

    August 29, 2025

    Microsoft has begun rolling out its annual feature update, Windows 11, version 25H2 (Build 26200.5074), to Insiders in the Release Preview Channel. The update, expected to reach general availability later this year, is now available for early testing ahead of its wider release. Unlike a full version overhaul, Windows 11 25H2 is delivered as an […]

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    CVE-2025-38170 – Linux kernel – arm64 FPSIMD SME Trap Handling Stale CPU State Vulnerability

    July 3, 2025

    CVE ID : CVE-2025-38170

    Published : July 3, 2025, 9:15 a.m. | 2 hours, 14 minutes ago

    Description : In the Linux kernel, the following vulnerability has been resolved:

    arm64/fpsimd: Discard stale CPU state when handling SME traps

    The logic for handling SME traps manipulates saved FPSIMD/SVE/SME state
    incorrectly, and a race with preemption can result in a task having
    TIF_SME set and TIF_FOREIGN_FPSTATE clear even though the live CPU state
    is stale (e.g. with SME traps enabled). This can result in warnings from
    do_sme_acc() where SME traps are not expected while TIF_SME is set:

    | /* With TIF_SME userspace shouldn’t generate any traps */
    | if (test_and_set_thread_flag(TIF_SME))
    | WARN_ON(1);

    This is very similar to the SVE issue we fixed in commit:

    751ecf6afd6568ad (“arm64/sve: Discard stale CPU state when handling SVE traps”)

    The race can occur when the SME trap handler is preempted before and
    after manipulating the saved FPSIMD/SVE/SME state, starting and ending on
    the same CPU, e.g.

    | void do_sme_acc(unsigned long esr, struct pt_regs *regs)
    | {
    | // Trap on CPU 0 with TIF_SME clear, SME traps enabled
    | // task->fpsimd_cpu is 0.
    | // per_cpu_ptr(&fpsimd_last_state, 0) is task.
    |
    | …
    |
    | // Preempted; migrated from CPU 0 to CPU 1.
    | // TIF_FOREIGN_FPSTATE is set.
    |
    | get_cpu_fpsimd_context();
    |
    | /* With TIF_SME userspace shouldn’t generate any traps */
    | if (test_and_set_thread_flag(TIF_SME))
    | WARN_ON(1);
    |
    | if (!test_thread_flag(TIF_FOREIGN_FPSTATE)) {
    | unsigned long vq_minus_one =
    | sve_vq_from_vl(task_get_sme_vl(current)) – 1;
    | sme_set_vq(vq_minus_one);
    |
    | fpsimd_bind_task_to_cpu();
    | }
    |
    | put_cpu_fpsimd_context();
    |
    | // Preempted; migrated from CPU 1 to CPU 0.
    | // task->fpsimd_cpu is still 0
    | // If per_cpu_ptr(&fpsimd_last_state, 0) is still task then:
    | // – Stale HW state is reused (with SME traps enabled)
    | // – TIF_FOREIGN_FPSTATE is cleared
    | // – A return to userspace skips HW state restore
    | }

    Fix the case where the state is not live and TIF_FOREIGN_FPSTATE is set
    by calling fpsimd_flush_task_state() to detach from the saved CPU
    state. This ensures that a subsequent context switch will not reuse the
    stale CPU state, and will instead set TIF_FOREIGN_FPSTATE, forcing the
    new state to be reloaded from memory prior to a return to userspace.

    Note: this was originallly posted as [1].

    [ Rutland: rewrite commit message ]

    Severity: 0.0 | NA

    Visit the link for more details, such as CVSS details, affected products, timeline, and more…

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